Non-Binary DDR5

[LunarMist]

Does anyone use it for RYZEn 7000 CPUs? I'm not understanding how it is not binary or what is really means to the RyZen. Due to the crappy AMD memory controller systems the performance sinks when more than 2 modules are installed.
We were thinking about upgrading to 96GB 6000 on the EXPO, but it does not seem to exist. The regular 6000 RAMs have been around for a long time now with the EXPO. There are many fast XAMP modules for the Intel systems.

 

[Mercutio]

Kingston offers a 2 DIMM 96GB DDR5 6000 CAS 32 with EXPO support, part number KF560C32RSK2-96.

Crucial has a 2 DIMM 48GB DDR5 6000 kit, but not a 96GB kit.
G. Skill and most of the other big players seem to have EXPO RAM with DDR5 5600.

I will admit that I don't know why the 12 / 24 / 48 / 96GB DIMM sizes are possible on DDR5 but they are part of the JEDEC spec, so they aren't THAT weird.

 

[LunarMist]

I suppose it could be trinary (3 values per cell), but that is even more weird.
I'm reluctant to gamble >$300 on non-EXpO that won't clock rightly to 6000. There should be DDR5-6000 48GB modules for sale if they were reliable on the AMD EXPO. I'm really hoping that AMD gets their crap together with the next CPU and fixes this defect so that we can use four RAM modules without a massive speed penalty. It should not take so long to boot either.

 

[Chewy509]

I will admit that I don't know why the 12 / 24 / 48 / 96GB DIMM sizes are possible on DDR5 but they are part of the JEDEC spec, so they aren't THAT weird.

IIRC, SDR -> DDR4 were a single 64bit wide data bus to the DIMM, but with DDR5 that was changed to a 2x 32bit data bus, thus allowing 2x 32bit reads to the DIMM to done independently. Due to the change to 32bit wide channels we can now have non power of 2 sizing of the actual memory chip itself... (basically the addressing modes changed to allow this).

And as a follow up, this allows someone to make 64Gb modules and due to manufacturing defects sell it as a 48Gb module instead, as IIRC there is a mapping unit inside the actual controller on the DIMM as well.

 

[sedrosken]

I had a feeling the non-^2 sizing was a way to maximize yields. As long as they perform about the same, I'm not fussed.

 

[LunarMist]

Obviously the mixed sizes don't perform the same on EXPO, or is it a capacity issue?

 

[LunarMist]

All the ones I found online are 2^(n)+2^(n-1). I was looking for n=25 modules.

I suppose the implication of non-binary is that in a reduced expression n is not a whole number.
log(2)(1.5) or ln(1.5)/ln(2) would be added to the whole number n, i.e., 2^25.584963=48GB.

Regardless, the non-binary nomenclature is poor. They could have called it split-capacity RAM, asymmetrical RAM, or something else less confusing.