[NEWS] - High end Athlon 64's to use 940 pin socket
- Thread starter Handruin
- Start date
CougTek
Hairy Aussie
I would be very interested in an Athlon 64 with dual-channel memory support. It would probably trounce Intel's highest-end Pentium 4 too...but also cost just as much.
blakerwry
Storage? I am Storage!
Don't both the opteron and the Athlon 64 have on Die memory controllers, while every other x86 chip has used a memory controller integrated into the mobo? I'm expecting this feature alone to provide more performance potential than anything else on the market.
blakerwry
Storage? I am Storage!
honold said:
why? ... and why?
Only by people who don't know what they are talking about honold.
Nearly all high-end MPU designs have moved to on-die memory controllers - UltraSPARC, Alpha, Power etc.
The reason is that the reduced memory access latencies more than make up for the additional die cost. Despite what Intel would have you believe, random or psuedo-random memory access patterns are the rule rather than the exception - especially in server environments, but also on the desktop. The only place where this is not the case are certain cases (not all by any means) of streaming media. Coincidently, this area of work places great emphasis on memory bandwidth - guess what the greatest area of differentiation is between AMD's and Intel uarch is?
Even this evaporates with Athlon64 - if it goes dual channel. 2 x 400DDR is the same bandwidth as Intel's greatest.
The downside is that it may be harder to upgrade an Athlon 64 board unless AMD pays attention to backward compatibility - but the overwhelming number of systems out there aren't upgreaded - they are replaced - so there is no guarantee that AMD will care about DIYers.
Mercutio
Fatwah on Western Digital
Given how "right" AMD's present socket has been (please to compare 370, 423 and 478), I rather hope that you're worrying needlessly, Liam; the fact that AMD motherboards *do* tend to have longer lifespans is one of the reasons I personally recommend them. Even as I tell my customers "You'll never upgrade this", I also say "But there's room to grow if you want to."
What, me worry?
No, just raising it as a possibility. I don't have inside knowledge and I'm not privy to AMD roadmaps. Just trying to address honolds point.
Everything I've read about the memory controller suggests that the 90nm jobbies will have DDR-II and DDR1-400 support, but it will be backward compatible. This means that you could conceivably drop a 90nm A64 into a board purchased this year, but you won't get DDR-II. This is pretty much what goes on now in AMD land so we should be OK - but as I said, I don't know this for a fact. It also means that the best board to get would be one using Socket 940.
No, just raising it as a possibility. I don't have inside knowledge and I'm not privy to AMD roadmaps. Just trying to address honolds point.
Everything I've read about the memory controller suggests that the 90nm jobbies will have DDR-II and DDR1-400 support, but it will be backward compatible. This means that you could conceivably drop a 90nm A64 into a board purchased this year, but you won't get DDR-II. This is pretty much what goes on now in AMD land so we should be OK - but as I said, I don't know this for a fact. It also means that the best board to get would be one using Socket 940.
well, with due respect i do believe intel knows what they are talking about.
memory is evolving very rapidly. pc2100 to pc2700, pc2700 to pc3200, pc3200 to dual-channel pc3200, and beyond. cpu fsbs scaled to use the bandwidth. these are our upgrades.
i'd have to see a side-by-side of costs and performance on the two schools to form an opinion on the matter.
memory is evolving very rapidly. pc2100 to pc2700, pc2700 to pc3200, pc3200 to dual-channel pc3200, and beyond. cpu fsbs scaled to use the bandwidth. these are our upgrades.
i'd have to see a side-by-side of costs and performance on the two schools to form an opinion on the matter.
And Alpha, IBM, SUN and AMD (ex-Alpha) don't?
With due respect, the Alpha boys and girls held the performance crown for a given process for 10 years against all-comers - including Intel. The only thing that kiled Alpha was a lack of enthusiasm from management. Only in the last twelve months has Itanium surpassed Alpha scores - and that is with a an Alpha design that is a process generation less advanced and a design that was finalised nearly four yearts ago. So I think they have a clue as well
So I repeat my assertion that anybody dismissing K8 because of the on-die memory controller hasn't got a clue. This isn't dismissing Intel's design path BTW, they just decided on another design path that is valid for their objectives.
With due respect, the Alpha boys and girls held the performance crown for a given process for 10 years against all-comers - including Intel. The only thing that kiled Alpha was a lack of enthusiasm from management. Only in the last twelve months has Itanium surpassed Alpha scores - and that is with a an Alpha design that is a process generation less advanced and a design that was finalised nearly four yearts ago. So I think they have a clue as well
So I repeat my assertion that anybody dismissing K8 because of the on-die memory controller hasn't got a clue. This isn't dismissing Intel's design path BTW, they just decided on another design path that is valid for their objectives.
Mercutio
Fatwah on Western Digital
[Thread Hijack]
Alpha suffered at the hands of DEC, Compaq and HP, three companies that collectively couldn't strategize their way out of a wet paper sack. I had the good fortune to work on 266MHz alphas when 66MHz 486s were exotic machines.
The whole DEC/HP/Compaq thing would probably make a good book. You could call it "How not to manage your Computer Business".
[/Thread Hijack]
Alpha suffered at the hands of DEC, Compaq and HP, three companies that collectively couldn't strategize their way out of a wet paper sack. I had the good fortune to work on 266MHz alphas when 66MHz 486s were exotic machines.
The whole DEC/HP/Compaq thing would probably make a good book. You could call it "How not to manage your Computer Business".
[/Thread Hijack]
honold, nice change of subject. Who said anything about cost or performance. My posts were in relation to your assertion that the Athlon64/Opteron on-die memory controller was the most criticised aspect of the CPU.
The only performance claim I made was that Opteron (and it looks like Socket 940 Athlon 64's) will have dual memory channels and support DDR 400 (likely, though not a given). This will negate Intel's 800MHz FSB - ie put both platforms on an equal footing (for a while).
Cost - AMD's ASP's are low. With their 64-bit CPU's they will try to raise their ASP so they will not doubt initially price them as high or slightly higher than equivalent Intel CPU's. If that doesn't work, expect AMD to go back to the practice of selling cheap CPU's - there is no other place for them to go.
The only differentiator then will be performance - and as they are both taking wildly different tracks, it will be a horses for course deal.
Reference material:
Opteron workstation perf: ie with AGP slot
http://www.amdzone.com/articleview.cfm?articleid=1304
caveats: pre-release board, beta drivers, Registered ECC memory. 32-bit app.
What you can expect: A64 will have a faster memory subsytem (unbuffered, no ECC). A revision or two in the chipset. chipset registers tuned for performance rather than stability. Higher clockspeeds.
server performance - PCI video
http://www.anandtech.com/cpu/showdoc.html?i=1818
Trying to gauge performance from a server board. Caveats above apply in spades.
Memory
http://www.lostcircuits.com/memory/ddrii/
fact and fiction behind DDR-II - it may actually be slower than DDR-1 at equivalent speeds
Frequent to RealWorldtech forums as well. Mostly EE types frequent them and their have been some lively discussions about the merits of various memory subsystems.
Various whitepapers from ISSC and MPR on Intel and AMD architecture.
Also note that the processor cache is designed to stop the processor from going to memory - and in fact most caches are so good that 92~95% of all memory requests are satisfied by L1 or L2 cache.
The notable exception is large streaming media - and this is what Intel have taken aim at. You can find some good information cache hits and programs on the University of Washington site.
Applying a bit of thought.
The only performance claim I made was that Opteron (and it looks like Socket 940 Athlon 64's) will have dual memory channels and support DDR 400 (likely, though not a given). This will negate Intel's 800MHz FSB - ie put both platforms on an equal footing (for a while).
Cost - AMD's ASP's are low. With their 64-bit CPU's they will try to raise their ASP so they will not doubt initially price them as high or slightly higher than equivalent Intel CPU's. If that doesn't work, expect AMD to go back to the practice of selling cheap CPU's - there is no other place for them to go.
The only differentiator then will be performance - and as they are both taking wildly different tracks, it will be a horses for course deal.
Reference material:
Opteron workstation perf: ie with AGP slot
http://www.amdzone.com/articleview.cfm?articleid=1304
caveats: pre-release board, beta drivers, Registered ECC memory. 32-bit app.
What you can expect: A64 will have a faster memory subsytem (unbuffered, no ECC). A revision or two in the chipset. chipset registers tuned for performance rather than stability. Higher clockspeeds.
server performance - PCI video
http://www.anandtech.com/cpu/showdoc.html?i=1818
Trying to gauge performance from a server board. Caveats above apply in spades.
Memory
http://www.lostcircuits.com/memory/ddrii/
fact and fiction behind DDR-II - it may actually be slower than DDR-1 at equivalent speeds
Frequent to RealWorldtech forums as well. Mostly EE types frequent them and their have been some lively discussions about the merits of various memory subsystems.
Various whitepapers from ISSC and MPR on Intel and AMD architecture.
Also note that the processor cache is designed to stop the processor from going to memory - and in fact most caches are so good that 92~95% of all memory requests are satisfied by L1 or L2 cache.
The notable exception is large streaming media - and this is what Intel have taken aim at. You can find some good information cache hits and programs on the University of Washington site.
Applying a bit of thought.
i didn't change the subject, but i'll accept the complimentLiamC said:
uh...The reason is that the reduced memory access latencies more than make up for the additional die cost....you did. in one sentence. i never brought it up directly, so i guess a 'nice change of subject' is in order for you as well!
you may observe the 'i think' part, and it was only stated because outside of the obvious 'why x86-64?', the on-die memory controller is literally the only thing i've heard a pre-complaint or doubt about.
the only thing i have personally expressed concern on, as concisely expressed in my initial post, is the quality of the chipset(s).
but since you have such a strong opinion about it, i'd like to hear something simple and quantifiable, such as 'here are the real-world benchmarks that show a 15-20% increase in speed using an on-die memory controller. use of it is expected to raise the cost of the cpu 20-25%.'
until i see such numbers from a reputable source, you won't find me arguing for or against it.
time
Storage? I am Storage!
honold, nice backpedal ... I think. :wink:
Umm, maybe you should re-read that sentence then. You are (or seem to be) equating cost and $$$.
In the context of my statement, cost equals an increase in die size. This may or may not translate into added cost at the purchase counter, but the competition between AMD and Intel will make this an irrelevant or hardly relevant factor. In a previous post I gave two possible alternative pricing models from AMD.
No not a strong opinion per se, as I have stated already, anybody who criticises the A64 because of the controller doesn't know what they are talking about - for reasons I have already outlined. You can disagree with those reasons if you like.
I have already shown real-world benchmarks that if interpreted correctly (we are afterall, talking about an unreleased product), should give you some inkling of the performance to be expected from A64.
In those links I provided, you can compare Opteron performance to the current fastest AthlonXP and P4 at fastest clockspeeds and (in the case of the AMD chips) at the same clockspeeds to see what the architecture changes bring to the table in a 32-bit OS. Make your own conclusions. What more do you want? If you want the final numbers, you will have to wait.
there was no backpedaltime said:
i only mentioned intel because they're huge, smart, and not doing it. for whatever reason, but i don't believe the fact that they aren't makes them stupid. i think the whole 'any argument is stupid' bit from liamc is presumptuous (to say the least) and a bad argument in general.
the athlon64 will be going against the desktop grain by using an on-die memory controller, so the burden of proof is on amd (or liamc) to show why things should change, not on intel (or me) to show why it shouldn't. one should not ignore cost or upgradability (in addition, of course, to performance) if they endeavor on defending the use of it because they are both signifigant factors for cpus and will weigh heavily on its success.
but really, i was only mentioning i've seen it commonly debated when discussing new features of the cpu.
Platform
Learning Storage Performance
LiamC said:
The last I heard, DDR-2 and DDR DIMMs are not 2-way compatible on pin count (240 pins for DDR-2, 184-pins for DDR) -- neither with signaling nor with operating voltage. DDR-2 will also be single channel (i.e. -- 1 DIMM at a time), unless someone has different plans. But, DDR-2 will definitely raise the performance bar over single channel DDR 50% to 100%.
The black horse at this point in time is M-RAM (Magnetic RAM). I haven't heard much about M-RAM in a while, but it should completely annihilate DDR-2 in performance and capability -- and I'm not exaggerating its potential when I say annihilate. Otherwise, no idea about cost per MB on M-RAM. Introduction should be, oh... er... 2005 or 2006. IBM (the inventor) and at least Infineon are working on getting it into production. M-RAM is static. Hopefully, M-RAM will be licensed and adopted as widely as DDR is now.
M-RAM should go a long way in filling in the performance gulf that exists now between microprocessors and RAM (DDR, DDR-2, RAMBUsT). Also, M-RAM's static storage characteristics could make for some interesting abilities such as halting a program's execution, turning off the computer, then resuming the program's execution at a later date with no loss of data or execution cycles -- as well as having truly "instant on" capability.
I have provided them. The benefit is there. What don't you understand?
Presumptuous? Burden of proof? Because a company dares to do things differently? LOL (at you). honold that is colossal arrogance on your part. How dare AMD do things differently.
I have proven my case, or at least provided supporting evidence for my case.
Like Intel does? Socket 370 Mk.1 (first Celerons), Mk2 (FC-PGA Celerons), Mk3 (Tualatins), Socket 423, Socket 478 Mk 1 (max 85W) Mk 2 (max 120W). And the things is, I don't know if AMD are ignoring the upgraders. They may, they may not. In the worst case, I do not see them as being any worse than Intel. At present, one could argue that AMD have a better track record than Intel with regards to upgrades. Whether this will continue is conjecture.
I have not said "any argument" honold - perhaps your reading skills need improving. I have stated and quoted what part of your post that I disagreed with and tried to support my viewpoint. You OTOH try to twist what was said and repeat your dogma. I have seen you start this argumentative behaviour in other threads - you seem to be long on bluster and short on facts - or supporting evidence.
Intel are free to pursue whatever design goals they like by whatever method - but because Intel doesn't do something, does not mean that others are wrong. All you are showing is your ignorance of design trade-offs. Both paths could be correct, or both wrong.
Intel design path - Rambus (oops)
Intel design path - Copper interconnects - "Bah humbug - you don't need it". We'll stick with Aluminium. Guess what Northwood uses? Copper. Oh dear.
Intel nearly always rubbishes what the opposition are doing (whoever they may be) and vica versa. If they don't have it then it can't be good. NIH syndrome. There can be more than one solution to a given problem.
time
Storage? I am Storage!
Platform. DDR-II doesn't have to be 2-way compatible, just backward. Because DDR-II uses more pins, doesn't mean that a socket could not be designed that takes both DIMM types - put a 184-pin DDR-I DIMM in and only 184 pins are used. Just so long as the right signal goes down the trace - things will work. Or there could be two socket types on the board, and you'd only need one active pin shorted (or open) to indicate the type of memory used. Would it be viable? Well I'm looking at a Jetway V266-B with support for DDR (184-pin) and SDRAM (168 pin) right now. I also had an FIC VA-503+ which supported SDRAM and EDO. So I guess it isn't too difficult. Certainly the signalling characteristics were different as well as the socket. The determining factor is the memory controller - and it doesn't matter if it is integrated or discete, it is just dependent upon what the designers of the circuitry thought.
Pradeep
Storage? I am Storage!
The problem with moving to on-die memory controllers is that it is then up to AMD to crank out new versions that support newer/better performing memory tech. So the onus of upgrading becomes the replacement of the cpu, rather than the mobo. As long as AMD continue to innovate things should be fine.
LiamC said:
no, you haven't. please see the bold text you quoted yourself above.
colossal arrogance is claiming 'hiv does not cause aids' without signifigant evidence.
what you're failing to get through your thick, belligerent skull is that i am not making a case for on-board memory controllers, nor am i making a case against on-die memory controllers. i am simply asking for the numbers and the philosophy on why amd believes this is the way to go, even with desktop cpus. how much faster it is compared directly with the same cpu using on-board, how much more it is expected to cost, and how much of a problem it is expected to cause for upgrades.
i am simply requesting information, not making an argument for or against anything. the fact that this is different from the direction everyone (including amd, up to this point) has taken on desktop cpus should make it clear that reasoning should be provided. i figured you were a good one to provide it, as you considered anyone who contested the idea of it an idiot.
i expected the same reasoning out of intel when they switched to rambus (or anyone that would have said, 'only idiots would doubt the use of rambus memory' before it was in production).
this is not me against you, this is not me against amd, this is me asking for information, dr. defensive.
if you want to resurrect any thread where i was debating something, feel free. until then, you're unqualified to make these kinds of sweeping statements.
http://www.nizkor.org/features/fallacies/ad-hominem.html
http://www.nizkor.org/features/fallacies/bandwagon.html
http://www.nizkor.org/features/fallacies/burden-of-proof.html
http://www.nizkor.org/features/fallacies/appeal-to-emotion.html
etcetera. you're full of these.
the fact that i've gotten in unpopular arguments (the most notable of which, proving 'dell deals are better than shop deals in the usa' on a good old boy, largely australian/foreign forum populated by multiple shop owners) doesn't mean my subsequent statements are invalid. furthermore, i don't think you'd be making such statements about 'blustering' if this was occuring over private messages.
the fact that i'm daring to ask for the reasoning for amd's actions (from the person who claims to have it) on that same forum (largely pro-amd) doesn't mean that i'm arguing against it - it only means i'm asking for reasoning.
<school's in>
You really do have a hard time with reading comprehension
When you haven't got any proof or supporting evidence you attack the person - just exactly what you are doing.
Here is where your comprehension needs attending to. What part of the following don't you understand.
I use the terms "don't", "not privy", "suggests", "conceivably".
I also explicitly state "I don't know this for sure". Now I think a person with the most basic understanding of english would get the idea that my statements are my opinion and that I am not claiming anything as fact. Can you point me to a statement where I in fact do?
What part of these numbers don't you understand? There are comparisons between Opteron which in effect is the same as a 940 pin A64 (which in case you've forgotten is what started this thread) and Athlon XP's (Barton and Thoroughbred) at the clock speed and fastest available clockspeeds. This is significant because it allows us to judge the effect of cache size. The T'bred has 256KB and Barton has 512. Some A64 andd Opteron has 1MB - low end A64 will have 512KB - anything left over from extrapolation is the improvment wrought by the memory subsystem and there are cases where the speed ups are significant. As it is an Opteron (and not an A64), with ECC and registered memory, then estimating the performance of A64 this way will give a lower bound, ie A64 will more likelyhood perform better. I have provided the numbers - you are flat out wrong. You may not like them, you may not agree, but that is not what you said and you offer no support for you stance - bluster. You are good at that.
<schools out>
You really do have a hard time with reading comprehension
When you haven't got any proof or supporting evidence you attack the person - just exactly what you are doing.
Here is where your comprehension needs attending to. What part of the following don't you understand.
I use the terms "don't", "not privy", "suggests", "conceivably".
I also explicitly state "I don't know this for sure". Now I think a person with the most basic understanding of english would get the idea that my statements are my opinion and that I am not claiming anything as fact. Can you point me to a statement where I in fact do?
What part of these numbers don't you understand? There are comparisons between Opteron which in effect is the same as a 940 pin A64 (which in case you've forgotten is what started this thread) and Athlon XP's (Barton and Thoroughbred) at the clock speed and fastest available clockspeeds. This is significant because it allows us to judge the effect of cache size. The T'bred has 256KB and Barton has 512. Some A64 andd Opteron has 1MB - low end A64 will have 512KB - anything left over from extrapolation is the improvment wrought by the memory subsystem and there are cases where the speed ups are significant. As it is an Opteron (and not an A64), with ECC and registered memory, then estimating the performance of A64 this way will give a lower bound, ie A64 will more likelyhood perform better. I have provided the numbers - you are flat out wrong. You may not like them, you may not agree, but that is not what you said and you offer no support for you stance - bluster. You are good at that.
I did not say that. I said that anyone who disses the chips just because it has any on-die controller "does not know what they are talking about". There are trade-offs - which I have even outlined, but they are just trade-offs, not a reason for dismissal - what part of that don't you understand? Can you get that through your
<schools out>
complete with lame-o <> tags, wow.
the fallacy links were an attack on your 'argument' style (which is a joke in itself, because i'm not arguing against the use of on-die - i only disagreed with your claim that doubters are automatic idiots). you were the one that turned the conversation south.
the part of the numbers you cited that i don't understand that they're numbers on amd 64bit cpus in 32bit mode contrasted with athlons and p4s, which i don't consider to be in the same class. what i requested, in plain english, was that. ideally i would i want to see an athlon64 on-die vs an athlon64 on-board (via disabling the internal mc and adding one on a board?).
if i wanted to compare the advantage of pc2100 ddr over pc133 sdram, i would not do so using a ddr athlon vs an sdram p3, i would do it using a ddr athlon vs an sdram athlon. similarly, i would like the comparison to be as close as possible on the a64 so that the only pronouncable differences are going to be directly caused by the memory controller.
i OBSERVED that the on-die controller is a source of debate, i did not debate it myself. i have seen numerous people that believe/argue that the athlon64 would be better off with an on-board memory controller. this does not in any way imply they think the athlon64 is a piece of shit, only that it could be better. if you're drawing that inferrence, i have no idea where it came from.
i OBSERVED that intel is not using on-die for their desktop cpus, and thus i find it wrong to categorically place all doubt of on-die in the file 'doesn't know what they're talking about.' never once have i said it was a bad idea, never once have i said it was a good idea. i am seeking information on why amd feels things should change. i am not arguing. can you make heads or tails of this?
proof of what, or evidence of what? i am not seeking to prove anything, i am requesting information. so much for your reading comprehension.
the fallacy links were an attack on your 'argument' style (which is a joke in itself, because i'm not arguing against the use of on-die - i only disagreed with your claim that doubters are automatic idiots). you were the one that turned the conversation south.
the part of the numbers you cited that i don't understand that they're numbers on amd 64bit cpus in 32bit mode contrasted with athlons and p4s, which i don't consider to be in the same class. what i requested, in plain english, was that. ideally i would i want to see an athlon64 on-die vs an athlon64 on-board (via disabling the internal mc and adding one on a board?).
if i wanted to compare the advantage of pc2100 ddr over pc133 sdram, i would not do so using a ddr athlon vs an sdram p3, i would do it using a ddr athlon vs an sdram athlon. similarly, i would like the comparison to be as close as possible on the a64 so that the only pronouncable differences are going to be directly caused by the memory controller.
i OBSERVED that the on-die controller is a source of debate, i did not debate it myself. i have seen numerous people that believe/argue that the athlon64 would be better off with an on-board memory controller. this does not in any way imply they think the athlon64 is a piece of shit, only that it could be better. if you're drawing that inferrence, i have no idea where it came from.
i OBSERVED that intel is not using on-die for their desktop cpus, and thus i find it wrong to categorically place all doubt of on-die in the file 'doesn't know what they're talking about.' never once have i said it was a bad idea, never once have i said it was a good idea. i am seeking information on why amd feels things should change. i am not arguing. can you make heads or tails of this?
LiamC said:
i see it as an appeal from you to anybody who disagreed with me on one of the dell threads to, by default, disagree with me here.
the entire 'point' there is bullshit anyway, regardless of intent.
if you think i was arguing something somewhere without fact, bring up the specific point up in the specific thread. no emotional generalizations.
even if you could uncontestably prove me wrong, it still has no relation to this thread. i'm not blustering about anything, i'm requesting clear facts.
honold, Your argument style is "assertion", assertion assertion. I identified the points I disagreed with and gave support for my point. Your reply was "no it isn't".
Great style there buddy - Damn, i'm convinced. :wink:
I specifically and categorically refuted your 'doesn't know what they're talking about' assertion - never once saying that it was your belief mind.
You are never going to get an Athlon 64 board with discrete memory controller - so you'll never know. Your comparison to DDR Athlon and SDRAM P3 is pure obfuscation - or in your terms bullshit.
I have tried to give examples - and I believe them to be valid - you just say bullshit. Good on you. A debater par excellence.
I consider this discussion closed.
Great style there buddy - Damn, i'm convinced. :wink:
I specifically and categorically refuted your 'doesn't know what they're talking about' assertion - never once saying that it was your belief mind.
You are never going to get an Athlon 64 board with discrete memory controller - so you'll never know. Your comparison to DDR Athlon and SDRAM P3 is pure obfuscation - or in your terms bullshit.
I have tried to give examples - and I believe them to be valid - you just say bullshit. Good on you. A debater par excellence.
I consider this discussion closed.
i don't think you're giving consideration to the fact that i'm actually trying to see your (or any) point here. the links you provided aren't saying to me, 'using an on-die memory controller is the best way to go.' they aren't saying 'using an on-board memory controller is the best way to go.' either. however, on-board is the standard right now, so i would like to know if/why it benefits me to adopt a change.
after reviewing what you consider to be proof, it's not clear to me whether it's a terrible, bad, break-even, good, or great idea - i see lots of things related to overall performance, but not drilling down to the use of an on-die controller.
i'm trying to get ANY evidence in ANY direction, and i still have absolutely no opinion on the matter. nobody has shown me that it's bad, nobody has shown me that it's good. if it's so difficult to prove, how can you claim that it's such a good idea that anybody who doubts it doesn't know what they're talking about?
after innumerable attempts to clarify this, you still seem to think i'm debating with you, or seeking to prove you wrong:
when i say, 'this hasn't convinced me,' i'm not standing there with a smirk and my arms crossed. i would be equally happy to think it's a great idea or a terrible idea, but unfortunately, after all this dumb talk, i only know that it is an idea.
after reviewing what you consider to be proof, it's not clear to me whether it's a terrible, bad, break-even, good, or great idea - i see lots of things related to overall performance, but not drilling down to the use of an on-die controller.
i'm trying to get ANY evidence in ANY direction, and i still have absolutely no opinion on the matter. nobody has shown me that it's bad, nobody has shown me that it's good. if it's so difficult to prove, how can you claim that it's such a good idea that anybody who doubts it doesn't know what they're talking about?
after innumerable attempts to clarify this, you still seem to think i'm debating with you, or seeking to prove you wrong:
when i say, 'this hasn't convinced me,' i'm not standing there with a smirk and my arms crossed. i would be equally happy to think it's a great idea or a terrible idea, but unfortunately, after all this dumb talk, i only know that it is an idea.
Wow, folks! Can I throw some hand grenades, too? :bravo:
LiamC said:
Sounds like a mechanical kludge. You're also assuming that the industry will even be using the same pin format that they presently use (talking about contact dimensions, contact type, etc).
The protocols are different between DDR and DDR-2. DDR-2 also requires a new lower voltage. I would also suspect (highly) that the bus impedance specification will change for DDR-2, meaning there would also be a degree of electrical incompatibility.
Now, THIS could be possible, but you'd have to go the way of Intel's recent memory controller hub because you'll have to convert DDR-2 signaling, electrical characteristics, and physical characteristics (trace count with socket) into compatible DDR signaling, electrical characteristics, and physical characteristics. Of course, a comm hub would be a major drain on memory performance.
:boom: OK, now summing up my diatribe...
I would have to say that once the "Opteron for DDR-2" shows up (2004?), it will require a whole new mobo because it'll require a 1000-pin socket to work with DDR-2. So, go out and get yer O-ron mobo now, knowing that you'll need a whole new mobo for the next generation O-ron processor and its DDR-2 RAM.
liamc seems to believe his evidence was sufficient to prove this, but i remain in the middle about the whole thing (how much faster is it? how much will it impact upgrading? how much more expensive is it? i have no idea).
so can any of you observers out there who knew nothing of the on-die/on-board debate say that you clearly believe on-die is the best way to go based on his evidence, perhaps even to the point that you think dissenters don't know what they're talking about?
so can any of you observers out there who knew nothing of the on-die/on-board debate say that you clearly believe on-die is the best way to go based on his evidence, perhaps even to the point that you think dissenters don't know what they're talking about?
honold said:
On-die memory controller implementations have always performed well. Sun UltraSPARC has certainly benefited for the past few years.
It's an engineering compromise that really doesn't translate all that well into the fast-paced commodity microprocessor market, only because the processor generations now have to stay in-sync with memory generations, with mobos also very likely having to stay in-synch with processor generations because of new processor sockets. Redesigning processor dies requires much more than pocket change. So, to get some level of profitability, you want to do this as infrequently as possible -- worst case, maybe every 18 months.
Otherwise, with Intel X86, chipsets change frequently with processor sockets and memory changing much slower.
Being very brief, the on board mem controller knocks off 2 clock cycles on each access. Depending upon the type of access that occurs, that 2 cycle savings can be modest to quite substantial in terms of the performance improvement observed on a benchmark level.
On board is an excellent step in the right direction. The majority of apps are latency sensitive.
Intel's PAT, and all the mainboard manu's variations, also address this very issue - shaving off clock cycles during mem accesses.
With its recent investment in Elpida, Intel may even very well be persuing resurecting Virtual Channel memory (albeit, this time VC-DDR, obviously) . This is good and bad. Good performance wise (it addresses latencies), but bad because it will more then likely cost more ... unless a whole slew of companies get on board ...supply and demand ....
DDR-2 is, IMO, a step in the wrong direction - it has higher latencies. All manu's want it because it it cheaper to make, and some want it really bad (read Micron) because their current chips don't cut it for the higher DDR1 speed grades in terms of latencies, and hence overall performance.
CK
On board is an excellent step in the right direction. The majority of apps are latency sensitive.
Intel's PAT, and all the mainboard manu's variations, also address this very issue - shaving off clock cycles during mem accesses.
With its recent investment in Elpida, Intel may even very well be persuing resurecting Virtual Channel memory (albeit, this time VC-DDR, obviously) . This is good and bad. Good performance wise (it addresses latencies), but bad because it will more then likely cost more ... unless a whole slew of companies get on board ...supply and demand ....
DDR-2 is, IMO, a step in the wrong direction - it has higher latencies. All manu's want it because it it cheaper to make, and some want it really bad (read Micron) because their current chips don't cut it for the higher DDR1 speed grades in terms of latencies, and hence overall performance.
CK
Explorer
Learning Storage Performance
Also, there's QDRRAM (Quad Data Rate RAM). Well, there was supposed to be QDR at some point in time after DDR-2 (maybe it's called DDR-3 nowadays). Who knows if it'll ever see the light of day. The idea of QDRRAM was being kicked around in 1999.
fool
Learning Storage Performance
I saw this and thought of you guys.
I found it through the inquirer.
I make no claim with regard to the validity or otherwise of these benchmarks. :wink:
I found it through the inquirer.
I make no claim with regard to the validity or otherwise of these benchmarks. :wink: